R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 503

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
17
16
15
14
Bit Name
ESIF
DTIF
DTSZ1
DTSZ0
Initial
value
0
0
0
0
R/W
R/(W)*
R/(W)*
R/W
R/W
Description
Transfer Escape Interrupt Flag
Flag indicating that a transfer escape end interrupt
request has occurred before the transfer counter
becomes 0 and transfer escape has ended.
0: Transfer escape end interrupt request is not
1: Transfer escape end interrupt request is generated
[Clearing conditions]
•
•
[Setting conditions]
•
•
•
Data Transfer Interrupt Flag
Flag indicating that a transfer end interrupt request has
occurred by the transfer counter.
0: Transfer end interrupt request is not generated by
1: Transfer end interrupt request is generated by the
[Clearing conditions]
•
•
[Setting condition]
•
Data Access Size 1 and 0
Selects the data access size.
00: Byte-size (8 bits)
01: Word-size (16 bits)
10: Longword-size (32 bits)
11: Setting prohibited
Writing 1 to the DTE bit
Writing 0 to ESIF while reading ESIF = 1
Transfer size error interrupt request is generated
Repeat size end interrupt request is generated
Extended repeat area overflow end interrupt request
is generated
Writing 1 to the DTE bit
Writing 0 to DTIF while reading DTIF = 1
When EDTCR becomes 0 and transfer has ended
generated
the transfer counter
transfer counter
Rev. 2.00 Sep. 24, 2008 Page 469 of 1468
Section 11 EXDMA Controller (EXDMAC)
REJ09B0412-0200