HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 307

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Receiving Serial Data: Follow the procedure in figure 12.15 for receiving serial data. When
switching from asynchronous mode to synchronous mode, be sure to check that PER and FER are
cleared to 0. If PER or FER is set to 1 the RDRF bit will not be set and both transmitting and
receiving will be disabled.
1
3
4
Clear ORER to 0 in SSR
Read ORER bit in SSR
Overrun error handling
from RDR, and clear
RDRF bit to 0 in SSR
Clear RE to 0 in SCR
Read RDRF in SSR
Start error handling
Read receive data
Start receiving
ORER = 1?
RDRF = 1?
receiving?
Finished
Initialize
Return
End
Figure 12.15 Sample Flowchart for Serial Receiving
No
Yes
Yes
Yes
No
No
Error handling
2
1.
2.
3.
4.
SCI initialization: the receive data function of the
RxD pin is selected automatically.
Receive error handling: if a receive error occurs,
read the ORER bit in SSR then, after executing
the necessary error handling, clear ORER to 0.
Neither transmitting nor receiving can resume
while ORER remains set to 1. When clock
output mode is selected, receiving can be halted
temporarily by receiving one dummy byte and
causing an overrun error. When preparations
to receive the next data are completed, clear
the ORER bit to 0. This causes receiving to
resume, so return to the step marked 2 in the
flowchart.
SCI status check and receive data read: read
the serial status register (SSR), check that
RDRF is set to 1, then read receive data from
the receive data register (RDR) and clear RDRF
to 0. Transition of the RDRF bit from 0 to 1
can be reported by an RXI interrupt.
To continue receiving serial data: read RDR and
clear RDRF to 0 before the MSB (bit 7) of the
current frame is received.
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