HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 63

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2.3.2
Figure 2.4 indicates the data formats in memory.
Word data stored in memory must always begin at an even address. In word access the least
significant bit of the address is regarded as 0. If an odd address is specified, no address error
occurs but the access is performed at the preceding even address. This rule affects MOV.W
instructions and branching instructions, and implies that only even addresses should be stored in
the vector table.
When the stack is addressed by register R7, it must always be accessed a word at a time. When the
CCR is pushed on the stack, two identical copies of the CCR are pushed to make a complete word.
When they are restored, the lower byte is ignored.
Note: * Ignored on return
Legend:
CCR: Condition code register
Byte data (CCR) on stack
Memory Data Formats
Word data on stack
Data Type
Word data
Byte data
1-bit data
Figure 2.4 Memory Data Formats
Even address
Even address
Even address
Odd address
Odd address
Odd address
Address
Address n
Address n
MSB
MSB
MSB
MSB
MSB
7
7
6
5
Data Format
Upper 8 bits
Lower 8 bits
4
CCR *
CCR
3
2
1
LSB
LSB
LSB
LSB
LSB
0
0
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