HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 320

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The SAR register can be accessed when ICE is 0. The ICMR register can be accessed when ICE is
1.
Bit 7: ICE
0
1
Note: * Pin SDA is multiplexed with the WAIT input pin. In expanded mode, WAIT input has priority
Bit 6—I
bus interface to the CPU.
Bit 6: IEIC
0
1
Bit 5—Master/Slave Select (MST)
Bit 4—Transmit/Receive Select (TRS)
MST selects whether the I
TRS selects whether the I
In master mode, when arbitration is lost, MST and TRS are both reset by hardware, causing a
transition to slave receive mode. In slave receive mode with the addressing format (FS = 0),
hardware automatically selects transmit or receive mode according to the R/W bit in the first byte
after a start condition.
MST and TRS select the operating mode as follows.
Bit 5: MST
0
1
288
for this pin.
2
C Bus Interface Interrupt Enable (IEIC): Enables or disables interrupts from the I
Description
Interface module disabled, with SCL and SDA signals in high-impedance state
Interface module enabled for transfer operations (pins SCL and SCA are
driving the bus*)
Description
Interrupts disabled
Interrupts enabled
Bit 4: TRS
0
1
0
1
2
2
C bus interface operates in transmit mode or receive mode.
C bus interface operates in master mode or slave mode.
Description
Slave receive mode
Slave transmit mode
Master receive mode
Master transmit mode
(Initial value)
(Initial value)
(Initial value)
2
C