PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 165

• Manufacturer Part Number: PIC18F6680-I/L
• Description: Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
• Manufacturer: Microchip Technology

Specifications of PIC18F6680-I/L

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/AUSART/CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Package / Case: PLCC-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.2
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to 0FFh upon Reset.
FIGURE 13-1:
TABLE 13-1:
 2004 Microchip Technology Inc.
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend:
Name
Timer2 Interrupt
Timer2 Module Register
Timer2 Period Register
Note 1: TMR2 register output can be software selected by the SSP module as a baud clock.
F
PSPIE
PSPIP
PSPIF
x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
OSC
Bit 7
—
/4
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
TIMER2 BLOCK DIAGRAM
ADIF
ADIE
ADIP
Bit 6
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
Prescaler
TMR0IE
RCIF
RCIE
RCIP
Bit 5
2
INT0IE
PIC18F6585/8585/6680/8680
Bit 4
TXIF
TXIE
TXIP
Comparator
TMR2
PR2
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
EQ
Reset
T2OUTPS3:T2OUTPS0
13.3
The output of TMR2 (before the postscaler) is fed to the
synchronous serial port module which optionally uses it
to generate the shift clock.
TMR0IF
CCP1IF
CCP1IE
CCP1IP
Bit 2
Postscaler
1:1 to 1:16
Output of TMR2
Output
TMR2
4
TMR2IF
TMR2IE
TMR2IP
INT0IF
Bit 1
(1)
TMR1IE 0000 0000 0000 0000
TMR1IP 1111 1111 1111 1111
TMR1IF 0000 0000 0000 0000
Bit 0
RBIF
bit TMR2IF
Sets Flag
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOR
Value on
DS30491C-page 163
Value on
all other
Resets