PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 275

Microcontrollers (MCU) 64KB 3328 RAM 52 I/O

PIC18F6680-I/L

Manufacturer Part Number
PIC18F6680-I/L
Description
Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC18F6680-I/L

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C/SPI/AUSART/CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Program Memory Type
Flash
Program Memory Size
64 KB
Package / Case
PLCC-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIC18F6680-I/L
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PIC18F6680-I/L
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22.2.1
The internal reference voltage of the LVD module,
specified in electrical specification parameter #D423,
may be used by other internal circuitry (the Program-
mable Brown-out Reset). If these circuits are disabled
(lower current consumption), the reference voltage
circuit requires a time to become stable before a low-
voltage condition can be reliably detected. This time is
invariant of system clock speed. This start-up time is
specified in electrical specification parameter #36. The
low-voltage interrupt flag will not be enabled until a
stable reference voltage is reached. Refer to the
waveform in Figure 22-4.
22.2.2
When the module is enabled, the LVD comparator and
voltage divider are enabled and will consume static cur-
rent. The voltage divider can be tapped from multiple
places in the resistor array. Total current consumption,
when enabled, is specified in electrical specification
parameter #D022B.
 2004 Microchip Technology Inc.
REFERENCE VOLTAGE SET POINT
CURRENT CONSUMPTION
PIC18F6585/8585/6680/8680
22.3
When enabled, the LVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the LVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
22.4
A device Reset forces all registers to their Reset state.
This forces the LVD module to be turned off.
Operation During Sleep
Effects of a Reset
DS30491C-page 273

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