PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 391

Microcontrollers (MCU) 64KB 3328 RAM 52 I/O

PIC18F6680-I/L

Manufacturer Part Number
PIC18F6680-I/L
Description
Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC18F6680-I/L

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C/SPI/AUSART/CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Program Memory Type
Flash
Program Memory Size
64 KB
Package / Case
PLCC-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F6680-I/L
Manufacturer:
RUBYCON
Quantity:
46 000
Part Number:
PIC18F6680-I/L
Manufacturer:
MICROCH
Quantity:
20 000
LFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
After Instruction
Decode
Decode
FSR2H
FSR2L
Q1
Read literal
Read literal
=
=
Load FSR
[ label ]
0
0
k
None
The 12-bit literal ‘k’ is loaded into
the file select register pointed to
by ‘f’.
2
2
‘k’ MSB
LFSR 2, 0x3AB
‘k’ LSB
1110
1111
Q2
f
k
0x03
0xAB
FSRf
2
4095
LFSR f,k
1110
0000
Process
Process
Data
Data
Q3
k
00ff
7
kkk
‘k’ to FSRfL
Write literal
literal ‘k’
MSB to
PIC18F6585/8585/6680/8680
FSRfH
Write
Q4
k
kkkk
11
kkk
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
W
REG
W
Q1
=
=
=
=
register ‘f’
Move f
[ label ]
0
d
a
f
N, Z
The contents of register ‘f’ are
moved to a destination dependent
upon the status of ‘d’. If ‘d’ is ‘0’, the
result is placed in W. If ‘d’ is ‘1’, the
result is placed back in register ‘f’
(default). Location ‘f’ can be any-
where in the 256-byte bank. If ‘a’ is
‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
MOVF
Read
0101
Q2
0x22
0xFF
0x22
0x22
f
[0,1]
[0,1]
dest
255
REG, 0, 0
MOVF
00da
Process
Data
Q3
DS30491C-page 389
f [,d [,a]]
ffff
Write W
Q4
ffff

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