PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 184

• Manufacturer Part Number: PIC18F6680-I/L
• Description: Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
• Manufacturer: Microchip Technology

Specifications of PIC18F6680-I/L

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/AUSART/CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Package / Case: PLCC-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6585/8585/6680/8680
FIGURE 16-8:
16.2.5.1
In the Full-Bridge Output mode, the P1M1 bit in the
CCP1CON register allows the user to control the
forward/reverse
firmware changes this direction control bit, the module
will assume the new direction on the next PWM cycle.
Just before the end of the current PWM period, the mod-
ulated outputs (P1B and P1D) are placed in their inactive
state while the unmodulated outputs (P1A and P1C) are
switched to drive in the opposite direction. This occurs in
a time interval of (4 T
before the next PWM period begins. The Timer2
prescaler will be either 1, 4 or 16, depending on the
value of the T2CKPS bit (T2CON<1:0>). During the
interval from the switch of the unmodulated outputs to
the beginning of the next period, the modulated outputs
(P1B and P1D) remain inactive. This relationship is
shown in Figure 16-9.
Note that in the Full-Bridge Output mode, the CCP1
module does not provide any dead-band delay. In
general, since only one output is modulated at all times,
dead-band delay is not required. However, there is a
situation where a dead-band delay might be required.
This situation occurs when both of the following
conditions are true:
1.
2.
DS30491C-page 182
The direction of the PWM output changes when
the duty cycle of the output is at or near 100%.
The turn off time of the power switch, including
the power device and driver circuit, is greater
than the turn on time.
PIC18FXX80/XX85
Direction Change in Full-Bridge Mode
direction.
P1A
P1B
P1C
P1D
OSC
EXAMPLE OF FULL-BRIDGE APPLICATION
* (Timer2 Prescale value))
When
the
application
FET
Driver
FET
Driver
QA
QB
Figure 16-10 shows an example where the PWM direc-
tion changes from forward to reverse at a near 100%
duty cycle. At time t1, the output P1A and P1D become
inactive while output P1C becomes active. In this
example, since the turn off time of the power devices is
longer than the turn on time, a shoot-through current
may flow through power devices QC and QD (see
Figure 16-8) for the duration of ‘t’. The same phenom-
enon will occur to power devices QA and QB for PWM
direction change from reverse to forward.
If changing PWM direction at high duty cycle is required
for an application, one of the following requirements
must be met:
1.
2.
Other options to prevent shoot-through current may
exist.
Reduce PWM for a PWM period before
changing directions.
Use switch drivers that can drive the switches off
faster than they can drive them on.
Load
V+
V-
QC
QD
 2004 Microchip Technology Inc.
FET
Driver
FET
Driver