HC230F1020 Altera, HC230F1020 Datasheet - Page 201

• Manufacturer Part Number: HC230F1020
• Manufacturer: Altera

Specifications of HC230F1020

• Lead Free Status / RoHS Status: Not Compliant

External
Memory
Interface
Support
Altera Corporation
September 2008
Companion Devices
EP2S30
HC210
EP2S60
HC210
EP2S90
HC210
EP2S60
HC220
EP2S90
HC220
EP2S130
HC220
EP2S90
HC230
EP2S130
HC230
Table 8–8. DQ and DQS Bus Mode support for Stratix II and HardCopy II Companion Devices (Part 1 of 2)
Note (1)
Stratix II and
HardCopy II
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
484-pin FineLine BGA
484-pin FineLine BGA
484-pin FineLine BGA
672-pin FineLine BGA
780-pin FineLine BGA
780-pin FineLine BGA
1,020-pin FineLine BGA
1,020-pin FineLine BGA
Like Stratix II devices, HardCopy II I/O pins have dedicated phase-shift
circuitry for interfacing with external memory, including DDR and DDR2
SDRAM, QDR II SRAM, RLDRAM II, and SDR SDRAM. A compensated
delay element on each DQS pin automatically aligns input DQS
synchronization signals with the data window of their corresponding DQ
data signals.
For all HardCopy II devices, the top I/O banks (3 and 4) support DQ and
DQS signals with DQ bus modes that vary from ×4, ×8/×9, ×16/×18 and
up to ×32/×36. The top bank has a phase-shifting reference circuit that
controls the compensated delay elements for all DQS pins on the top
bank.
For the HC230 and HC240 HardCopy II devices, the bottom I/O banks (7
and 8) also support DQ and DQS signals with DQ bus modes from ×4,
×8/×9, ×16/×18 and ×32/×36. Similar to the top banks, the bottom I/O
banks of these devices also have a phase-shifting reference circuit to
control the delay elements at the bottom DQS pins.
companion device pair.
Package
Table 8–8
shows the number of DQ and DQS buses supported per
Number of ×4
Groups
36
36
4
4
4
9
9
9
(3)
×8/×9 Groups
Number of
18
18
2
2
2
4
4
4
External Memory Interface Support
Number of
×16/×18
Groups
2
2
2
8
8
Number of
Preliminary
×32/×36
Groups
4
4
8–13