HC230F1020 Altera, HC230F1020 Datasheet - Page 208

• Manufacturer Part Number: HC230F1020
• Manufacturer: Altera

Specifications of HC230F1020

• Lead Free Status / RoHS Status: Not Compliant

HardCopy Series Handbook, Volume 1
8–20
Differential I/O Termination
Similar to the FPGA, HardCopy II devices provide an on-chip 100-Ω
differential termination option on each differential receiver channel for
LVDS and HyperTransport technology standards. When using an HC240
device as a companion device, differential termination is supported on all
row I/O pins that support LVDS and HyperTransport technology
standards.
When using HC230, HC220, and HC210 devices, only the left row I/O
pins support differential termination. The right row I/O pins do not
support LVDS and HyperTransport technology standards.
Notes to
(1)
(2)
(3)
3.3-V LVTTL
3.3-V LVCMOS
2.5-V LVTTL
2.5-V LVCMOS
1.8-V LVTTL
1.8-V LVCMOS
1.5-V LVTTL
1.5-V LVCMOS
2.5-V SSTL class I
2.5-V SSTL class II
1.8-V SSTL class I
1.8-V SSTL class II
1.8-V HSTL class I
1.8-V HSTL class II
1.5-V HSTL class I
Table 8–14. HardCopy II Selectable I/O Drivers with On-Chip Series
Termination with Calibration
These numbers are preliminary and pending silicon characterization.
HardCopy II HC210 and HC220 devices do not support on-chip series
termination with calibration on bottom I/O pins.
Support pending HardCopy II characterization.
I/O Standard
Table
8–14:
HC230, HC240 Column
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
I/O Pins
Note (1)
50 Ω
25 Ω
50 Ω
25 Ω
50 Ω
25 Ω
(3)
(3)
(3)
Column I/O Pins
HC210, HC220 Top
Altera Corporation
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
September 2008
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
25 Ω
50 Ω
25 Ω
50 Ω
(2)