HC230F1020 Altera, HC230F1020 Datasheet - Page 222

• Manufacturer Part Number: HC230F1020
• Manufacturer: Altera

Specifications of HC230F1020

• Lead Free Status / RoHS Status: Not Compliant

HardCopy Series Handbook, Volume 1
8–34
Note to
(1)
EP2S180
(1)
Stratix II
Table 8–20. DSP Multiplier Availability for Stratix II and HardCopy II Companion Devices (Part 2 of 2)
Device
If these Stratix II devices are selected with smaller HardCopy II companion devices, all Stratix II DSP resources may
not be available if all the Stratix II ALM blocks are used and fully utilized. Quartus II will determine available
resources for DSP and ALM implementation when compiling with HardCopy II devices.
Table
9 × 9 18 × 18 36 × 36 9 × 9 18 × 18 36 × 36 9 × 9 18 × 18 36 × 36 9 × 9 18 × 18 36 × 36
8–20:
HC210
Figure 8–8
8 available 9 × 9 multiplier blocks and an accumulator block to implement
an 8 × 8 bit multiplication function with clock latency. When this DSP
block is implemented in the HardCopy II design, the Quartus II Compiler
chooses the appropriate entry from the macro library to implement the
9 × 9 multiplier and accumulator block which results in an optimized
logic utilization and placement flexibility.
Figure 8–8. HardCopy II Floorplan of 8 × 8 DSP Block
shows an example of a Stratix II DSP block that uses only 1 of
HC220
768
HC230
384
96
768
Altera Corporation
September 2008
HC240
384
96