CY7C63231A-PXC Cypress Semiconductor Corp, CY7C63231A-PXC Datasheet - Page 26

• Manufacturer Part Number: CY7C63231A-PXC
• Description: IC MCU 3K USB LS PERIPH 18-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™r

Specifications of CY7C63231A-PXC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (3 kB)
• Controller Series: CY7C632xx
• Ram Size: 96 x 8
• Interface: USB
• Number Of I /o: 10
• Voltage - Supply: 3.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Processor Series: CY7C63xx
• Core: M8B
• Data Bus Width: 16 bit
• Program Memory Size: 3 KB
• Data Ram Size: 96 B
• Interface Type: PS2, USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 10
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

12-bit Free-running Timer
The 12-bit timer operates with a 1-μs tick, provides two interrupts
(128μs and 1.024ms) and allows the firmware to directly time
events that are up to 4 ms in duration. The lower 8 bits of the
timer can be read directly by the firmware. Reading the lower 8
Bit [7:0]: Timer lower 8 bits
Document #: 38-08028 Rev. *D
Read/Write
Read/Write
Bit Name
Bit Name
Reset
Reset
Bit #
Bit #
R
7
0
7
0
-
VREG Enable
R
6
0
6
0
-
Figure 18. Diagram of USB - PS/2 System Connections
Port 2.5
Reserved
Port 2.0
Figure 20. Timer MSB Register (Address 0x25)
Figure 19. Timer LSB Register (Address 0x24)
PS/2 Pull-up
Enable
Port 2.4
USB - PS/2
Driver
R
5
0
5
0
-
Regulator
3.3V
5 kΩ
R
4
0
4
0
-
Timer [7:0]
V
bits latches the upper 4 bits into a temporary register. When the
firmware reads the upper 4 bits of the timer, it is actually reading
the count stored in the temporary register. The effect of this is to
ensure a stable 12-bit timer value can be read, even when the
two reads are separated in time.
CC
5 kΩ
R
R
3
0
3
0
200Ω
On-chip
Off-chip
R
R
2
0
2
0
VREG
Timer [11:8]
1.3 kΩ
D+/SCLK
D–/SDATA
CY7C63221/31A
R
R
1
0
1
0
Page 26 of 47
R
R
0
0
0
0
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