CY7C63231A-PXC Cypress Semiconductor Corp, CY7C63231A-PXC Datasheet - Page 39

• Manufacturer Part Number: CY7C63231A-PXC
• Description: IC MCU 3K USB LS PERIPH 18-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™r

Specifications of CY7C63231A-PXC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (3 kB)
• Controller Series: CY7C632xx
• Ram Size: 96 x 8
• Interface: USB
• Number Of I /o: 10
• Voltage - Supply: 3.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Processor Series: CY7C63xx
• Core: M8B
• Data Bus Width: 16 bit
• Program Memory Size: 3 KB
• Data Ram Size: 96 B
• Interface Type: PS2, USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 10
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Absolute Maximum Ratings
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with Power Applied...... –0°C to +70°C
Supply voltage on V
DC Input Voltage .................................. –0.5V to +V
DC Voltage Applied to Outputs in High Z State .... –0.5V to +
V
DC Characteristics
F
Document #: 38-08028 Rev. *D
V
V
I
I
I
I
V
T
I
I
I
V
t
V
C
V
V
V
Notes
OSC
CC
CC1
CC2
SB1
SB2
IL
SNK
SRC
VCCS
4. Full functionality is guaranteed in V
5. Bench measurements taken under nominal operating conditions. Spec cannot be guaranteed at final test.
6. Total current cumulative across all Port pins, limited to minimize Power and Ground-Drop noise effects.
7. LVR is automatically disabled during suspend mode.
8. LVR will re-occur whenever V
9. V
10. In suspend mode, V
CC1
CC2
PP
RSNTR
LVR
REG
OHU
OLU
OHZ
REG
+0.5V
is not regulated, and should not be used as a general source of regulated voltage in that case. During receive of USB data, the VREG output drops when D–
is LOW due to internal series resistance of approximately 200Ω at the VREG pin.
RG
= 6 MHz; Operating Temperature = 0 to 70°C
specified for regulator enabled, idle conditions (i.e., no USB traffic), with load resistors listed. During USB transmits from the internal SIE, the VREG output
Operating Voltage
Operating Voltage
V
Oscillator Mode.
Typical I
V
Oscillator Mode.
Typical I
Standby Current - No Wake-up Osc
Standby Current - With Wake-up Osc
Programming Voltage (disabled)
Resonator Start-up Interval
Input Leakage Current
Max I
Max I
Low-voltage Reset Trip Voltage
V
VREG Regulator Output Voltage
Capacitance on VREG Pin
Static Output High, driven
Static Output Low
Static Output High, idle or suspend
CC
CC
CC
Low-voltage and Power-on Reset
Operating Supply Current - Internal
Operating Supply Current - External
Power-on Slew Time
SS
CC
CC
RG
CC1
CC2
GPIO Sink Current
GPIO Source Current
is only valid if R
relative to V
= 13 mA
= 16 mA
USB Interface
CC
Parameter
General
drops below V
CC1
[5]
[5]
range, except USB transmitter specifications and GPIO output currents are guaranteed for V
PU
SS
is connected from D– to VREG pin, and R
............–0.5V to +7.0V
LVR
. In suspend or with LVR disabled, BOR occurs whenever V
CC
+0.5V
V
4.35
–0.4
Min
3.0
2.8
3.5
2.7
LVR
Max
5.25
256
100
300
5.5
0.4
4.0
3.6
3.6
0.3
3.6
20
17
25
75
70
30
Maximum Total Sink Output Current into Port 0 and 1 and Pins
70 mA
Maximum Total Source Output Current into Port 0 and 1 and Pins
30 mA
Maximum On-chip Power Dissipation on any GPIO Pin50 mW
Power Dissipation..................................................... 300 mW
Static Discharge Voltage ........................................... >2000V
Latch-up Current ..................................................... >200 mA
1
PD
is connected from D– to ground
Units
mA
mA
mA
mA
μA
μA
μA
ms
μs
pF
V
V
V
V
V
V
V
V
Note 4
Note 4
V
V
V
V
Oscillator off, D– > 2.7V
Oscillator off, D– > 2.7V
V
Any I/O pin
Cumulative across all ports
Cumulative across all ports
V
linear ramp: 0 to 4V
Load = R
External cap not required
R
With R
R
D– to VREG pin
CC
CC
CC
CC
CC
CC
PD
PD
connected D– to Gnd, R
= 5.5V, no GPIO loading
= 5.0V. T = Room Temperature
= 5.5V, no GPIO loading
= 5.0V. T = Room Temperature
= 5.0V, ceramic resonator
below V
to Gnd
CC
PU
drops below approximately 2.5V.
PU
to VREG pin
[4]
+R
LVR
Conditions
PD
[4]
for >100 ns
[9, 10]
[8]
CY7C63221/31A
CC2
range.
[6]
[6]
[7]
PU
connected
Page 39 of 47
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