CY7C63231A-PXC Cypress Semiconductor Corp, CY7C63231A-PXC Datasheet - Page 7

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CY7C63231A-PXC

Manufacturer Part Number
CY7C63231A-PXC
Description
IC MCU 3K USB LS PERIPH 18-DIP
Manufacturer
Cypress Semiconductor Corp
Series
enCoRe™r
Datasheets

Specifications of CY7C63231A-PXC

Applications
USB Microcontroller
Core Processor
M8B
Program Memory Type
OTP (3 kB)
Controller Series
CY7C632xx
Ram Size
96 x 8
Interface
USB
Number Of I /o
10
Voltage - Supply
3.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Processor Series
CY7C63xx
Core
M8B
Data Bus Width
16 bit
Program Memory Size
3 KB
Data Ram Size
96 B
Interface Type
PS2, USB
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
10
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C63231A-PXC
Manufacturer:
CYP
Quantity:
485
Part Number:
CY7C63231A-PXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Programming Model
Refer to the CYASM Assembler User’s Guide for more details on
firmware operation with the microcontrollers.
Program Counter (PC)
The 14-bit program counter (PC) allows access for 3 Kbytes of
EPROM using the architecture. The program counter is cleared
during reset, such that the first instruction executed after a reset
is at address 0x0000. This is typically a jump instruction to a reset
handler that initializes the application.
The lower 8 bits of the program counter are incremented as
instructions are loaded and executed. The upper 6 bits of the
program counter are incremented by executing an XPAGE
instruction. As a result, the last instruction executed within a
256-byte “page” of sequential code should be an XPAGE
instruction. The assembler directive “XPAGEON” will cause the
assembler to insert XPAGE instructions automatically. As
instructions can be either one or two bytes long, the assembler
may occasionally need to insert a NOP followed by an XPAGE
for correct execution.
The program counter of the next instruction to be executed, carry
flag, and zero flag are saved as two bytes on the program stack
during an interrupt acknowledge or a CALL instruction. The
program counter, carry flag, and zero flag are restored from the
program stack only during a RETI instruction.
Please note the program counter cannot be accessed directly by
the firmware. The program stack can be examined by reading
SRAM from location 0x00 and up.
Note that there are restrictions in using the JMP, CALL, and
INDEX instructions across the 4-KB boundary of the program
memory. Refer to the CYASM Assembler User’s Guide for a
detailed description.
8-bit Accumulator (A)
The accumulator is the general-purpose, do-everything register
in the architecture where results are usually calculated.
8-bit Index Register (X)
The index register “X” is available to the firmware as an auxiliary
accumulator. The X register also allows the processor to perform
indexed operations by loading an index value into X.
8-bit Program Stack Pointer (PSP)
During a reset, the program stack pointer (PSP) is set to zero.
This means the program “stack” starts at RAM address 0x00 and
“grows” upward from there. Note that the program stack pointer
is directly addressable under firmware control, using the MOV
PSP,A instruction. The PSP supports interrupt service under
hardware control and CALL, RET, and RETI instructions under
firmware control.
Document #: 38-08028 Rev. *D
During an interrupt acknowledge, interrupts are disabled and the
program counter, carry flag, and zero flag are written as two
bytes of data memory. The first byte is stored in the memory
addressed by the program stack pointer, then the PSP is incre-
mented. The second byte is stored in memory addressed by the
program stack pointer and the PSP is incremented again. The
net effect is to store the program counter and flags on the
program “stack” and increment the program stack pointer by two.
The return from interrupt (RETI) instruction decrements the
program stack pointer, then restores the second byte from
memory addressed by the PSP. The program stack pointer is
decremented again and the first byte is restored from memory
addressed by the PSP. After the program counter and flags have
been restored from stack, the interrupts are enabled. The effect
is to restore the program counter and flags from the program
stack, decrement the program stack pointer by two, and
re-enable interrupts.
The call subroutine (CALL) instruction stores the program
counter and flags on the program stack and increments the PSP
by two.
The return from subroutine (RET) instruction restores the
program counter, but not the flags, from program stack and
decrements the PSP by two.
8-bit Data Stack Pointer (DSP)
The data stack pointer (DSP) supports PUSH and POP instruc-
tions that use the data stack for temporary storage. A PUSH
instruction will pre-decrement the DSP, then write data to the
memory location addressed by the DSP. A POP instruction will
read data from the memory location addressed by the DSP, then
post-increment the DSP.
During a reset, the Data Stack Pointer will be set to zero. A PUSH
instruction when DSP equals zero will write data at the top of the
data RAM (address 0xFF). This would write data to the memory
area reserved for a FIFO for USB endpoint 0. In non-USB appli-
cations, this works fine and is not a problem.
For USB applications, the firmware should set the DSP to an
appropriate location to avoid a memory conflict with RAM
dedicated to USB FIFOs. Since there are only 80 bytes of RAM
available (except Endpoint FIFOs) the DSP should be set
between 0x00 and 0x4Fh. The memory requirements for the
USB endpoints are shown in Section . For example, assembly
instructions to set the DSP to 20h (giving 32 bytes for program
and data stack combined) are shown below:
MOV A,20h
or less to avoid USB FIFOs)
SWAP A,DSP ; swap accumulator value into DSP register
; Move 20 hex into Accumulator (must be D8h
CY7C63221/31A
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