CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 306

• Manufacturer Part Number: CY8CTST200-48LTXIT
• Description: IC MCU 32K FLASH 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-48LTXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Index
Pending Interrupt bits 252
PgMode bits 254
pin behavior during reset 135
pin information, See pinouts
pinouts
PMAx_CUR register 180
POR and LVD 143
PORLEV bits 279
PORS bit 258
power modes
power on reset (POR)
power on reset in system resets 139
PPM bit 217
PPS bit 217
product upgrades 16
programmable timer 161
ProtectBlock function in SROM 36
protocol function for SPI 145
PRTxDM0 register 60, 259
PRTxDM1 register 60, 260
PRTxDR register 59, 188
PRTxIE register 59, 189
PSelect bit 239
PSoC core
PSSDC bits 283, 284, 285
PT_CFG register 163, 164, 221
PT_DATA1 register 164
PTx_DATA0 register 164, 223
PTx_DATA1 register 164, 222
PXD_EN bit 213
R
RAM paging 39
ReadBlock function in SROM 35
306
in MVR_PP register 237
in MVW_PP register 238
in STK_PP register 235
16-pin part 19
24-pin part 20
32-pin part 21
48-pin part 22
architecture 143
register definitions 144
system resets 141
See POR and LVD
architecture 161
register definitions 163
architecture 23
overview 14
register summary 24
See also CPU core
architecture 39
basic paging 39
current page pointer 40
index memory page pointer 41
interrupts 40
MVI instructions 40
register definitions 42
stack operations 40
reference of all registers 187
register conventions 17, 187
register definitions
register mapping tables
registers
regulated IO
RES_WDT register 77, 253
RLOCLK bit 212
RX Reg Full bit 192
S
serial peripheral interconnect, See SPI
Slave bit 261
slave function for SPI 146
slave operation, I2C 118
sleep and watchdog 73
Sleep bit
comparators 103
CPU core 32
digital clocks 112
general purpose IO 59
I2C slave 122
internal low speed oscillator 68
internal main oscillator 64
interrupt controller 48
IO analog multiplexer 100
POR and LVD 144
programmable timer 163
RAM paging 42
sleep and watchdog 77
SPI 147
supervisory ROM 38
system resets 137
TrueTouch module 92
USB, full-speed 171
bank 0 registers 184
bank 1 registers 185
bank 0 registers 188
bank 1 registers 259
core register summary 24
internal M8C registers 27
maneuvering around 187
mapping tables 183
reference of all registers 187
system resources register summary 106
TrueTouch register summary 84
application overview 70
architecture 69
application overview 76
architecture 73
bandgap refresh 80
register definitions 77
sleep sequence 79
sleep timer 76
timing diagrams 79
wake up sequence 80
watchdog timer 81
in CPU_SCR0 register 258
in INT_CLR0 register 242
in INT_MSK0 register 250
[+] Feedback