Z85C3008VSG Zilog, Z85C3008VSG Datasheet - Page 59

• Manufacturer Part Number: Z85C3008VSG
• Description: IC 8MHZ Z8500 CMOS SCC 44-PLCC
• Manufacturer: Zilog
• Series: SCCr

Specifications of Z85C3008VSG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Cpu Speed: 8MHz
• Digital Ic Case Style: LCC
• No. Of Pins: 44
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 85
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3932; Z85C3008VSG

SCC™/ESCC™ User’s Manual
Interfacing the SCC/ESCC
2.5 BLOCK/DMA TRANSFER (Continued)
Once the FIFO is locked, it allows the checking of the Re-
ceive Error FIFO (RR1) to find the cause of the error. Lock-
ing the data FIFO, therefore, stops the error status from
popping out of the Receive Error FIFO. Also, since the
DMA request becomes inactive, the interrupt (Special
Condition) is serviced.
2-40
D7- D0
PCLK
/REQ
AD7-AD0
/RD
PCLK
/REQ
/DS
/AS
WR8
Receive Data
Figure 2-33. Z80X30 Receive Request Release
Figure 2-34. Z85X30 Receive Request Release
Receive Data
Once the FIFO is unlocked by the Error Reset command,
/REQ again follows the state of the receive buffer.
In the case of the Z80X30, /REQ goes High in response to
the falling edge of /DS, but only if the appropriate receive
buffer in the SCC is accessed (Figure 2-33). In the case of
the Z85X30, /REQ goes High in response to the falling
edge of /RD, but only when the appropriate receive buffer
in the SCC is accessed (Figure 2-34).
UM010901-0601