PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 100

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
• As a slave device the transceiver part of the SBCX-X is programmed and controlled
• For data exchange between two microcontroller systems attached to two different
3.7.3.1
The MONITOR channel operates on an asynchronous basis. While data transfers on the
bus take place synchronized to frame sync (FSC), the flow of data is controlled by a
handshake procedure using the MONITOR Channel Receive (MR) and MONITOR
Channel Transmit (MX) bits. Data is placed onto the MONITOR channel and the MX bit
is activated. This data will be transmitted once per 8-kHz frame until the transfer is
acknowledged via the MR bit.
The MONITOR channel protocol is described in the following section and
illustrates this. The relevant control and status bits for transmission and reception are
listed in
Table 10
Table 11
Data Sheet
Control/
Status Bit
Control
Status
Control/
Status Bit
Control
Status
from a master device on IOM-2 (e.g. ISAR34 PSB 7115). This is used in applications
where no microcontroller is connected directly to the SBCX-X in order to simplify host
interface connection. The HDLC controlling is processed by the master device
therefore the HDLC data is transferred via IOM-2 interface directly to the master
device.
devices on one IOM-2 backplane. Use of the MONITOR channel avoids the necessity
of a dedicated serial communication path between the two systems. This simplifies the
system design of terminal equipment.
Table 10
Handshake Procedure
Register
MOCR
MOSR
MSTA
Register
MOCR
MOSR
Transmit Direction
Receive Direction
and
Table
Bit
MXC
MIE
MDA
MAB
MAC
Bit
MRC
MRE
MDR
MER
11.
Function
MX Bit Control
Transmit Interrupt Enable
Data Acknowledged
Data Abort
Transmission Active
Function
MR Bit Control
Receive Interrupt Enable
Data Received
End of Reception
100
Description of Functional Blocks
PEB 3081
PEF 3081
2000-09-27
Figure 53