PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 104

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
MX/MR Treatment in Error Case
In the master mode the MX/MR bits are under control of the microcontroller through MXC
or MRC, respectively. An abort is indicated by an MAB interrupt or MER interrupt,
respectively.
In the slave mode the MX/MR bits are under control of the device. An abort is always
indicated by setting the MX/MR bit inactive for two or more IOM-2 frames. The controller
must react with EOM.
Figure 54
an example for an abort requested by the transmitter and
for a successful transmission.
Figure 54
Figure 55
Data Sheet
shows an example for an abort requested by the receiver,
IOM -2 Frame No.
MR (DU)
MX (DD)
IOM -2 Frame No.
MX (DU)
MR (DD)
Monitor Channel, Transmission Abort requested by the Receiver
Monitor Channel, Transmission Abort requested by the Transmitter
1
0
1
0
1
0
1
0
1
1
2
2
Abort Request from Transmitter
Abort Request from Receiver
104
3
3
4
4
Description of Functional Blocks
Figure 56
5
5
EOM
EOM
6
6
mon_rec-abort.vsd
mon_tx-abort.vsd
shows an example
Figure 55
7
7
PEB 3081
PEF 3081
2000-09-27
shows