PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 169

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
CFS ... Configuration Select
This bit determines clock relations and recovery on S/T and IOM interfaces.
0: The IOM interface clock and frame signals are always active, "Power Down" state
included.
The states "Power Down" and "Power Up" are thus functionally identical except for the
indication: PD = 1111 and PU = 0111.
With the C/I command Timing (TIM) the microcontroller can enforce the "Power Up" state
and with C/I command Deactivation Indication (DI) the "Power Down" state is reached
again.
However, it is also possible to activate the S-interface directly with the C/I command
Activate Request (AR 8/10/L) without the TIM command.
1: The IOM interface clock and frame signals are normally inactive ("Power Down").
For activating the IOM-2 clocks the "Power Up" state can be induced by software
(IOM_CR.SPU) or by resetting CFS again.
After that the S-interface can be activated with the C/I command Activate Request (AR
8/10/L). The "Power Down" state can be reached again with the C/I command
Deactivation Indication (DI).
Note: After reset the IOM interface is always active. To reach the "Power Down" state
For general information please refer to
RSS2, RSS1... Reset Source Selection 2,1
The SBCX-X reset sources for the RSTO output pin can be selected according to the
table below.
Data Sheet
Bit 1
0
0
1
1
RSS
the CFS-bit has to be set.
Bit 0
0
1
0
1
C/I Code
Change
--
--
x
(reserved)
EAW
--
--
x
Chapter
169
Watchdog
Timer
3.3.8.
--
--
x
Detailed Register Description
PEB 3081
PEF 3081
2000-09-27