PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 30

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
Header 40
The non-interleaved A-D-A-D sequence gives direct read/write access to the complete
address range and can have any length. In this mode SDX and SDR can be connected
together allowing data transmission on one line.
Example for a read/write access with header 40
Header 48
The interleaved A-D-A-D sequence gives direct read/write access to the complete
address range and can have any length. This mode allows a time optimized access to
the registers by interleaving the data on SDX and SDR (SDR and SDX must not be
connected together).
Example for a read/write access with header 48
Header 43
This mode can be used for a fast access to the HDLC FIFO data. Any address (rdadr,
wradr) in the range 00
selected by an internal pointer which is automatically incremented with every data byte
following the first address byte. The sequence can have any length and is terminated by
the rising edge of CS.
Example for a write access with header 43
Example for a read access with header 43
Data Sheet
SDR header wradr wrdata
SDX
SDR header wradr wrdata
SDX
SDR header wradr wrdata
SDX
SDR header rdadr
SDX
H
H
H
: Non-interleaved A-D-A-D Sequences
: Interleaved A-D-A-D Sequences
: Read-/Write- only A-D-D-D Sequence (Constant Address)
H
-1F
rddata
(wradr)
(rdadr)
H
and 6A
wrdata
rddata
rdadr
rdadr
(wradr)
(rdadr)
H
/7A
H
H
30
H
wrdata
rddata
rddata rddata
rddata
rdadr
(wradr)
:
(rdadr)
:
gives access to the current FIFO location
H
H
:
:
wrdata
rddata
wradr wrdata
rdadr
Description of Functional Blocks
(wradr)
(rdadr)
wrdata
rddata
rdata
(wradr)
(rdadr)
wrdata
rddata
wradr wrdata
(wradr)
(rdadr)
PEB 3081
PEF 3081
wrdata
rddata
2000-09-27
(wradr)
(rdadr)