PSB2115HV1.2 Lantiq, PSB2115HV1.2 Datasheet - Page 203

• Manufacturer Part Number: PSB2115HV1.2
• Manufacturer: Lantiq

Specifications of PSB2115HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
3.6.4.2
The transition criteria used by the IPAC are described in the following sections. They are
grouped into:
– C/I commands
– Pin states
– Events on the S/T-interface.
C/I Commands
AR
ARL
DC
DR
RES
TM1
TM2
Pin States
Pin-RES
S/T-Interface Events
I0
I0
I3
I3
INFO 0 detected
Level detected (signal different to I0)
INFO 3 detected
Any INFO other than INFO 3
LT-S Mode Transition Criteria
Activation Request. This command is used to start an exchange initiated
activation.
Activation request loop. The IPAC is requested to operate an analog loop-
back close to the S/T-interface.
Deactivation Confirmation. Transfers the LT-S into a deactivated state in
which it can be activated from a terminal (detection of INFO 0 enabled).
Deactivation Request. Initiates a complete deactivation from the exchange
side by transmitting INFO 0. Unconditional command.
Please refer to section 3.6.3.2 (C/I command description) for details.
Test Mode 1. Transmission of single pulses on the S/T-interface. The
pulses are transmitted with alternating polarity at a frequency of 2 kHz.
TM1 is an unconditional command.
Test Mode 2. Transmission of continuous pulses on the S/T-interface. The
pulses are sent with alternating polarity at a rate of 96 kHz. TM2 is an
unconditional command.
Pin Reset. Please refer to section 3.6.3.2 (pin states).
203
Operational Description
PSB 2115
PSF 2115
11.97