PSB2115HV1.2 Lantiq, PSB2115HV1.2 Datasheet - Page 75

• Manufacturer Part Number: PSB2115HV1.2
• Manufacturer: Lantiq

Specifications of PSB2115HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

SQM
RCVE
C/W/P
Semiconductor Group
IPAC issues S1 and Q messages in the IOM-2 monitor channel only after a
change has been detected. The S2 channel is not available in non-auto
mode.
In transparent mode monitor messages containing the S1, S2 and Q data
are forwarded to IOM-2 once per multiframe (5 ms), regardless of the data
content. Programming the SQM bit is only relevant if multiframing on S/T is
selected (bit MFD configuration register). See also MON-1 and MON-2
monitor messages.
Receive Code Violation Errors. The user has the option to issue a C/I error
code (CVR) everytime an illegal code violation has been detected. The
implementation is realized according to ANSI T1.605.
This bit has three different meanings depending on the operational mode of
the IPAC:
In LT-S mode the S/T bus configuration is programmed. For point-to-point
or extended passive bus configurations an adaptive timing recovery must be
chosen. This allows the IPAC to adapt to cable length dependent round trip
delays.
In LT-T mode the user selects the amount of permissible wander before a
C/I code warning will be issued by the IPAC. The warning may be sent after
25 s (C/W/P=1) or 50 s (C/W/P=0).
Note:
The C/I indication SLIP which will be issued if the specified wander has been
exceeded, is only a warning. Data has not been lost at this stage.
In TE mode this bit is not used
Selects the SQ channel handling mode. In non-auto mode operation, the
75
Functional Description
PSB 2115
PSF 2115
11.97