PSB2115HV1.2 Lantiq, PSB2115HV1.2 Datasheet - Page 233

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PSB2115HV1.2

Manufacturer Part Number
PSB2115HV1.2
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB2115HV1.2

Lead Free Status / Rohs Status
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Semiconductor Group
XBC11-8 … Transmit Byte Count (most significant bits)
Only valid if DMA mode is selected (DMA=1):
Together with XBC7-0 the length of the next frame to be transmitted in DMA mode is
determined (1 ... 4096 bytes).
4.2.20
Value after reset: (not defined)
RLCR
RC … Receive Check (on/off)
0 … receive length check feature disabled
1 … receive length check feature enabled
Note: All bytes stored in the RFIFOB are relevant for the receive length check feature
RL … Receive Length
The maximum receive length after which data reception is suspended can be
programmed here. Depending on the value RL programmed via RL5 … RL0, the receive
length is (RL + 1) 64 bytes! A frame exceeding this length is treated as if it was aborted
by the opposite station (RME Interrupt, RAB bit set).
In this case, the Receive Byte Count (RBCHB, RBCLB) is greater than the programmed
receive length.
including the receiver status byte.
RLCR - Receive Length Check Register (WRITE)
7
RC
0
RL5
233
Detailed Register Description
0
RL0
PSB 2115
PSF 2115
(2E/6E)
11.97

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