PI7C8150AMAE Pericom Semiconductor, PI7C8150AMAE Datasheet - Page 6

• Manufacturer Part Number: PI7C8150AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 208-FQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 208-FQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

06-0057
4
5
6
7
8
9
10
4.1
4.2
4.3
4.4
5.1
5.2
5.3
5.4
6.1
6.2
6.3
6.4
7.1
7.2
7.3
8.1
8.2
9.1
9.2
4.2.1
4.2.2
4.3.1
4.3.2
4.4.1
4.4.2
6.2.1
6.2.2
6.2.3
6.2.4
7.2.1
7.2.2
8.2.1
8.2.2
8.2.3
8.2.4
3.8.4.2
3.8.4.3
ADDRESS DECODING....................................................................................... 41
TRANSACTION ORDERING ............................................................................ 47
ERROR HANDLING ........................................................................................... 52
EXCLUSIVE ACCESS ........................................................................................ 63
PCI BUS ARBITRATION ................................................................................... 66
CLOCKS................................................................................................................ 69
GENERAL PURPOSE I/O INTERFACE.......................................................... 69
ADDRESS RANGES ................................................................................................................... 41
I/O ADDRESS DECODING........................................................................................................ 41
MEMORY ADDRESS DECODING ........................................................................................... 43
VGA SUPPORT........................................................................................................................... 46
TRANSACTIONS GOVERNED BY ORDERING RULES ....................................................... 47
GENERAL ORDERING GUIDELINES ..................................................................................... 48
ORDERING RULES.................................................................................................................... 48
DATA SYNCHRONIZATION .................................................................................................... 51
ADDRESS PARITY ERRORS .................................................................................................... 52
DATA PARITY ERRORS ........................................................................................................... 53
DATA PARITY ERROR REPORTING SUMMARY................................................................. 58
SYSTEM ERROR (SERR_L) REPORTING............................................................................... 62
CONCURRENT LOCKS ............................................................................................................. 63
ACQUIRING EXCLUSIVE ACCESS ACROSS PI7C8150A .................................................... 63
ENDING EXCLUSIVE ACCESS................................................................................................ 65
PRIMARY PCI BUS ARBITRATION ........................................................................................ 66
SECONDARY PCI BUS ARBITRATION.................................................................................. 66
PRIMARY CLOCK INPUTS....................................................................................................... 69
SECONDARY CLOCK OUTPUTS ............................................................................................ 69
I/O BASE AND LIMIT ADDRESS REGISTER................................................................ 42
ISA MODE........................................................................................................................... 43
MEMORY-MAPPED I/O BASE AND LIMIT ADDRESS REGISTERS ......................... 44
PREFETCHABLE MEMORY BASE AND LIMIT ADDRESS REGISTERS ................. 45
VGA MODE......................................................................................................................... 46
VGA SNOOP MODE........................................................................................................... 46
CONFIGURATION WRITE TRANSACTIONS TO CONFIGURATION SPACE.......... 53
READ TRANSACTIONS .................................................................................................... 53
DELAYED WRITE TRANSACTIONS............................................................................... 54
POSTED WRITE TRANSACTIONS.................................................................................. 57
LOCKED TRANSACTIONS IN DOWNSTREAM DIRECTION ..................................... 63
LOCKED TRANSACTION IN UPSTREAM DIRECTION .............................................. 65
SECONDARY BUS ARBITRATION USING THE INTERNAL ARBITER.................... 66
PREEMPTION .................................................................................................................... 68
SECONDARY BUS ARBITRATION USING AN EXTERNAL ARBITER...................... 68
BUS PARKING.................................................................................................................... 68
TARGET DISCONNECT ................................................................................................ 40
TARGET ABORT ............................................................................................................ 40
Page 6 of 111
2-PORT PCI-TO-PCI BRIDGE
APRIL 2006 – Revision 1.1
PI7C8150A