PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 140

IC INTERFACE LINE 80-MQFP

PEB2255H-V13

Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2255H-V13

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
Figure 51 gives an overview of influences on synchronization status for the case of
different external actions. Activation of auto-mode and non-auto mode is performed via
bit FMR4.AUTO. Generally, for initiating resynchronization it is recommended to use bit:
FMR0.EXLS first. In case where the synchronizer remains in the asynchronous state, bit
FMR0.FRS may be used to enforce it to lock onto the next framing candidate, although
it might be a simulated one.
5.4.3
The allocation of the FT bits (bit 1 of frames 1 and 3) for frame alignment signal is shown
in
Remote alarm (yellow alarm) is indicated by setting bit 2 to ‘0’ in each time slot.
Table 33
Frame Number
1
2
3
4
5.4.3.1
For multiframe synchronization, the terminal framing bits (FT bits) are observed. The
synchronous state is reached if at least one terminal framing candidate is definitely
found, or the synchronizer is forced to lock onto the next available candidate
(FMR0.FRS).
5.4.4
Normally, this kind of multiframe structure only makes sense when using the
CAS Robbed Bit Signaling. The multiframe alignment signal is located at the FS-bit
position of every other frame (refer to
There are two possibilities of remote alarm (yellow alarm) indication:
• Bit 2 = 0 in each time slot of a frame, selected with bit FMR0.SRAF = 0
• The last bit of the multiframe alignment signal (bit 1 of frame 12) changes from ‘0’ to
Data Sheet
Table
‘1’, selected with bit FMR0.SRAF = 1.
33.
4-Frame Multiframe (F4 Format, T1/J1)
Synchronization Procedure
12-Frame Multiframe (D4 or SF Format, T1/J1)
4-Frame Multiframe Structure (T1/J1)
F
1
0
T
Table
140
34).
Functional Description T1/J1
F
Service bit
Service bit
S
FALC-LH V1.3
PEB 2255
2000-07

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