PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 233

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

RRA…
AUXP…
NMF…
Data Sheet
Multiframe alignment has been regained if two consecutive CRC-
multiframes have been received without a framing error (refer to
FRS0.LMFA).
The bit is set during alarm simulation and reset if FMR0.SIM is
cleared and no alarm condition exists.
If bit FRS0.LFA is cleared a loss of frame alignment recovery interrupt
status ISR2.FAR is generated.
Receive Remote Alarm
Set if bit 3 of the received service word is set. An alarm interrupt status
ISR2.RA can be generated if the alarm condition is detected.
FRS0.RRA is cleared when no alarm is detected. At the same time a
remote alarm recovery interrupt status ISR2.RAR is generated.
The bit RSW.RRA has the same function.
Both status and interrupt status bits are set during alarm simulation.
Auxiliary Pattern Indication
This bit is set when 254 or more ‘10’ are received in a time interval of
250 s and the frame alignment is lost FRS0.LFA = 1. An interrupt
status ISR3.API is generated if this bit is set.
The bit is reset when no auxiliary pattern condition is detected. The
bit is also set during alarm simulation and reset if FMR0.SIM is
cleared and no alarm condition exists.
No Multiframe Alignment Found
This bit is only valid if the CRC4 interworking is selected
(FMR2.RFS1/0 = 11). Set if the multiframe pattern could not be
detected in a time interval of 400 ms after the framer has reached the
doubleframe synchronous state. The receiver is then automatically
switched to doubleframe format.
This bit is reset if the basic framing has been lost.
233
FALC-LH V1.3
E1 Registers
PEB 2255
2000-07