PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 277

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

DAIS…
SAIS…
PLB…
AXRA…
Data Sheet
11… F24:
Disable AIS to System Interface
0…
1…
Send AIS Towards System Interface
Sends AIS (blue alarm) via output RDO towards system interface.
This function is not influenced by bit FMR2.DAIS.
Payload Loop Back
0
1…
Automatic Transmit Remote Alarm
0
1…
framer has locked on the right pattern (no extensive CRC
errors). Therefor bit FMR1.CRC must be set.
Synchronization is achieved on verification of the framing
pattern and the CRC6 bits. Synchronous state is reached when
framing pattern and CRC6 checksum are correctly found. For
correct operation the CRC check must be enabled by setting bit
FMR1.CRC6.
AIS is automatically inserted into the data stream to RDO if
FALC
Automatic AIS insertion is disabled. Furthermore, AIS insertion
can be initiated by programming bit FMR2.SAIS.
Normal operation. Payload loop is disabled.
The payload loopback loops the data stream from the receiver
section back to transmitter section. Looped data is output on
pin RDO. Data received on port XDI, XSIG, SYPX and XMFS
are ignored. With FMR4.TM=1 all 193 bits per frame are looped
back. If FMR4.TM=0 the DL- or FS- or CRC-bits are generated
internally. AIS is sent immediately on port RDO by setting the
FMR2.SAIS bit. During payload loop is active the receive time
slot offset (registers RC1...0) should not be changed. It is
recommended to write the actual value of XC1 into this register
once again, because a write access to register XC1 sets the
read/write pointer of the transmit elastic buffer into its optimal
position to ensure a maximum wander compensation (the write
operation forces a slip).
Normal operation
The remote alarm (yellow alarm) bit is set automatically in the
outgoing data stream if the receiver is in asynchronous state
(FRS0.LFA bit is set). In synchronous state the remote alarm bit
is reset.
®
-LH is in asynchronous state.
277
FALC-LH V1.3
T1/J1 Registers
PEB 2255
2000-07