PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 73

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

PEB 2255
FALC-LH V1.3
Functional Description E1
4.3
Transmit Path in E1 Mode
Compared to the receive path the inverse functions are performed for the transmit
direction.
The interface to the transmit system highway is realized by two data buses, one for the
data XDI and one for the signaling data XSIG. The time slot assignment is equivalent to
the receive direction.
Latching of data is controlled by the System Clock (SCLKX) and the Synchronous Pulse
(SYPX/XMFS) in conjunction with the programmed offset values for the Transmit Time
slot/Clock slot Counters XC1/0. Refer also to
Table 13
on page 69.
The received bit stream on ports XDI and XSIG can be multiplexed internally on a time
slot basis, if enabled by SIC3.TTRF = 1, if not serial CAS mode is selected (see
Chapter 4.1.12.3
on page 66). The data received on port XSIG can be sampled if the
transmit signaling marker XSIGM is active high. Data on port XDI is sampled if XSIGM
is low for the respective time slot. Programming the XSIGM marker is done with registers
TTR1-4.
Data Sheet
73
2000-07