PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 292

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

SCL1...0…
EQON…
ELOS…
LL…
MAS…
Data Sheet
Select Clock Output
00… Output frequency on pin CLKX is 2048 kHz active high.
01… Output frequency on pin CLKX is 2048 kHz active low.
10… Output frequency on pin CLKX is 4096 kHz active high.
11… Output frequency on pin CLKX is 4096 kHz active low.
Receive Equalizer On
0…
1…
Enable Loss of Signal
0…
1…
Local Loop
0
1
Master Mode
0
1
-10 dB Receiver: short haul mode
-36 dB Receiver: long haul mode
Normal operation, the extracted receive clock is output on pin
RCLK
During of loss of signal (FRS0.LOS = 1) output RCLK is set
high.
Normal operation
Local loop active. The local loopback mode disconnects the
receive lines RL1/RL2 (RDIP/RDIN, respectively) from the
receiver. Data provided by system interface is routed back to
the system interface. The transmitted data is not affected.
Receiver and transmitter coding must be identical. Operates in
analog and digital line interface mode. In analog line interface
mode data is looped through the complete analog receiver.
Slave mode
Master mode on. If this bit is set and the SYNC pin is connected
to
internal DCO’s of the jitter attenuator are centered and the
system clocks which are output via CLK8M/CLKX are stable
(divided from the DCO frequencies). If a clock (1.544 MHz or
2.048 MHz) is detected at the SYNC pin the FALC-LH
synchronizes automatically to this clock. The production
tolerance is approximately
C
Load
V
SS
= 15 pF.
the FALC-LH works as a master for the system. The
292
30 ppm of the crystal frequency if
FALC-LH V1.3
T1/J1 Registers
PEB 2255
2000-07