CN8237EBGB Mindspeed Technologies, CN8237EBGB Datasheet - Page 121

• Manufacturer Part Number: CN8237EBGB
• Description: ATM SAR 622Mbps 3.3V ABR/CBR/GFR/UBR/VBR 456-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8237EBGB

• Package: 456BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 622 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3.135 V

CN8237
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
5.4.1 Scatter Method
Figure 5-10. Host and SAR RSM-Shared Memory Data Structures for Scatter Method
28237-DSH-001-C
5.4 Buffer Management
Once CPCS-PDU processing has been implemented, the cell payloads are written
to data buffers. Each channel retrieves the location of its buffers from one of 32
free buffer queues. The reassembly coprocessor tracks the location of the buffers
from the VCC table entry for that channel.
NOTE:
The CN8237 uses an intelligent scatter method to write cell payload data to host
memory. During reassembly to host memory, the reassembly coprocessor uses the
DMA coprocessor to control the scatter function. The reassembly coprocessor
controls the incoming DMA block during scatter DMA to host memory.
host memory, one in SAR RSM-shared memory, and one in internal memory. The
linked cell buffers (HCELL_BUFF) and reassembly buffer descriptors reside in
host memory, and the free buffer queues (HFR_BUFF_QU) reside in SAR
RSM-shared memory. The free buffer queues also have an associated free buffer
queue base table. This table is in internal memory. The CN8237 allows for up to
32 independent free buffer queues.
Data buffers are supplied according to the mechanisms detailed below.
Four data structures are maintained, as illustrated in
Buffer Descriptors
Cell Buffers
The process cycle time of a read transaction across the PCI bus is much
longer than a write transaction, due to the PCI bus being held in a busy
state while the remote processor accesses and processes the read request.
Therefore, to speed up processing flow during reassembly, the CN8237
uses only control and status writes across the PCI bus between host and
local systems.
HOST
Mindspeed Technologies
SAR RSM-Shared
(Inside the CN8237)
Free Buffer Queues
Free Buffer Queue
Base Table
™
5.0 Reassembly Coprocessor
Figure
5.4 Buffer Management
5-10: two in the
8237_048
5-13