XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 177
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
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13.4.3 Output Compare 7 Mask Register
M68HC12B Family — Rev. 8.0
MOTOROLA
NOTE:
Read: Anytime
Write: Anytime
OC7M[7:0] Bits
OC7M has priority over output action on the timer port enabled by OMn and OLn
bits in TCTL1 and TCTL2. If an OC7M bit is set, it prevents the action of
corresponding OM and OL bits on the selected timer port.
The bits of OC7M correspond bit-for-bit with the timer port (PORTT) bits. Setting
the OC7Mn will set the corresponding port to be an output port regardless of the
state of the DDRTn bit, when the corresponding TIOSn bit is set to be an output
compare. This does not change the state of the DDRT bits. At successful OC7,
for each bit that is set in OC7M, the corresponding data bit OC7D is stored to
the corresponding bit of the timer port. See
Address: $0082
Reset:
Read:
Write:
OC7M7
Figure 13-7. Output Compare 7 Mask Register (OC7M)
Bit 7
Enhanced Capture Timer (ECT) Module
0
with Output Compare/Pulse Accumulator A
OC7M6
Figure 13-8. Block Diagram for Port 7
OC7
6
0
PULSE ACCUMULATOR A
OM7 = 1 OR OL7 = 1 OR OC7M7 = 1
OC7M5
5
0
OC7M4
4
0
Enhanced Capture Timer (ECT) Module
Figure
OC7M3
3
0
13-8.
OC7M2
PAD
2
0
OC7M1
Timer Registers
1
0
Data Sheet
OC7M0
Bit 0
0
177
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