XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 81

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

5.4.1 Mode Register
M68HC12B Family — Rev. 8.0
MOTOROLA
Special expanded narrow:
Normal expanded narrow:
Special expanded wide:
Normal expanded wide:
Normal single-chip:
Special single-chip:
Reset states:
Peripheral:
Address: $000B
The mode register (MODE) controls the MCU operating mode and various
configuration options. This register is not in the map in peripheral mode.
Read: Anytime
Write: Varies from bit to bit
SMODN, MODB, MODA — Mode Select Special, B, and A Bits
ESTR — E Clock Stretch Enable Bit
IVIS — Internal Visibility Bit
Read:
Write:
These bits show the current operating mode and reflect the status of the BKGD,
MODB, and MODA input pins at the rising edge of reset.
SMODN can be written only if SMODN = 0 (in special modes) but the first write
is ignored; MODB, MODA may be written once if SMODN = 1; anytime if
SMODN = 0, except that special peripheral and reserved modes cannot be
selected.
ESTR determines if the E clock behaves as a simple free-running clock or as a
bus control signal that is active only for external bus cycles. ESTR is always 1
in expanded modes since it is required for address demultiplexing and must
follow stretched cycles.
Normal modes: Write once
Special modes: Write anytime
IVIS determines whether internal ADDR/DATA, R/W, and LSTRB signals can
be seen on the bus during accesses to internal locations. In special expanded
narrow mode, it is possible to configure the MCU to show internal accesses on
an external 16-bit bus. The IVIS control bit must be set to 1. When the system
is configured this way, visible internal accesses are shown as if the MCU was
1 = E stretches high during external access cycles and low during non-visible
0 = E never stretches (always free running)
SMODN
Bit 7
1
1
0
0
0
1
0
internal accesses
Figure 5-1. Mode Register (MODE)
Operating Modes and Resource Mapping
MODB
6
0
1
0
1
1
0
0
MODA
5
1
1
1
1
0
0
0
ESTR
4
1
1
1
1
1
1
1
Operating Modes and Resource Mapping
Mode and Resource Mapping Registers
IVIS
3
0
0
1
1
1
0
1
EBSWAI
2
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
EME
Bit 0
Data Sheet
0
0
1
1
1
0
1
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