XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 318

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Development Support
Data Sheet
318
TARGET MCU
SPEEDUP PULSE
BKGD PIN
SPEEDUP
BKGD PIN
DRIVE TO
TARGET MCU
E CLOCK
TARGET
PULSE
TARGET MCU
HOST
START OF BIT TIME
START OF BIT
E CLOCK
MCU
DRIVE AND
BKGD PIN
BKGD PIN
DRIVE TO
PERCEIVED
HOST
PERCEIVED
TIME
Figure 18-2. BDM Target to Host Serial Bit Timing (Logic 1)
Figure 18-3. BDM Target to Host Serial Bit Timing (Logic 0)
Figure 18-3
is asynchronous to the target MCU, there is a 0-to-1 cycle delay from the
host-generated falling edge on BKGD to the start of the bit time as perceived by the
target MCU. The host initiates the bit time but the target MCU finishes it. Since the
target wants the host to receive a logic 0, it drives the BKGD pin low for 13 E-clock
cycles, then briefly drives it high to speed up the rising edge. The host samples the
bit level about 10 cycles after starting the bit time.
HIGH IMPEDANCE
10 CYCLES
R-C RISE
shows the host receiving a logic 0 from the target MCU. Since the host
10 CYCLES
10 CYCLES
10 CYCLES
Development Support
HIGH IMPEDANCE
HOST SAMPLES
HIGH IMPEDANCE
HOST SAMPLES
BKGD PIN
BKGD PIN
SPEEDUP PULSE
HIGH IMPEDANCE
M68HC12B Family — Rev. 8.0
EARLIEST
START OF
NEXT BIT
EARLIEST
START OF
NEXT BIT
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