mt90810ap Zarlink Semiconductor, mt90810ap Datasheet - Page 19

• Manufacturer Part Number: mt90810ap
• Description: 256 X 128 Channels Flexible Mvip Interface Circuit Fmic
• Manufacturer: Zarlink Semiconductor

Mode [bits]
Note 1: FRMx represents either FRMA for group A,
0 [00]
1 [01]
or FRMB for Group B
7
MODE
6
Programmed output
FGx[0:11] are programmable output pins. All 8 bits of FRMx_START register are driven out
pins FGx[0:7] (with bit 0 corresponding to pin FGx[0] etc.) and bits 0-3 of FRMx_MODE register
are driven out pin FGx[8:11] (with bit 0 corresponding to pin FGx[8] etc.).
DSi/DSo output enables
FGA[4:11] pins correspond to output drive enables for the MVIP DSo streams 0 to 7,
respectively.
FGB[4:11] pins correspond to output drive enables for the MVIP DSi streams 0 to 7,
respectively.
FGx[0:3] are programmable output pins. The least significant four bits of FRMx_MODE register
are driven out pins FGx[0:3] (with bit 0 corresponding to pin FGx[0] etc.).
(dependent on MODE bits)
5
4
MODE [10/11]
VARIABLE
MODE [00]
MODE [01]
3
Figure 8 - Frame Mode (FRMx_MODE) Register
Figure 9 - Frame Start (
2
1
Table 13 - Frame Group Mode Bits
7
7
7
0
6
6
6
Zarlink Semiconductor Inc.
PROG_OUT(7:0)
MT90810
5
5
5
RESERVED
4
4
4
STRT(7:0)
19
MODE [00]
MODE [01]
MODE [10/11]
Description
3
3
3
1
FRMx_STRT) Register
7
7
7
2
2
2
FRM_TYPE
6
6
6
1
1
1
RESERVED
RESERVED
5
5
5
0
0
0
BIT_RATE
4
4
4
3
3
3
2
2
2
PROG_OUT(3:0)
PROG_OUT(11:8)
STRT
1
1
1
0
0
0
Data Sheet