mt90810ap Zarlink Semiconductor, mt90810ap Datasheet - Page 36

no-image

mt90810ap

Manufacturer Part Number
mt90810ap
Description
256 X 128 Channels Flexible Mvip Interface Circuit Fmic
Manufacturer
Zarlink Semiconductor
Datasheet
DS [RD]
DTACK
AD[0:7]
CS
WR
AD[0:7]
ALE
Notes:
RDY is only driven low during memory (slow cycles).
t
A[0:1]
R/W [WR]
CS
RDY
DH
is measured from either CS or WR going high, whichever is earlier.
Figure 22 - Motorola Non-multiplexed Bus Timing for Read Cycle (ALE=VDD)
Figure 21 - Intel Multiplexed Bus Timing for Write Cycle (ALE is active)
t
AS
t
AS
Add
t
AH
t
DAC
Zarlink Semiconductor Inc.
Write Data
t
ACC
MT90810
t
RDY
36
t
DAC
t
ACC
Read Data
t
t
AH
DH
t
DOFF
Data Sheet

Related parts for mt90810ap