mt90810ap Zarlink Semiconductor, mt90810ap Datasheet - Page 20

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mt90810ap

Manufacturer Part Number
mt90810ap
Description
256 X 128 Channels Flexible Mvip Interface Circuit Fmic
Manufacturer
Zarlink Semiconductor
Datasheet
Notes: FRMx represents either FRMA for frame group A, or FRMB for group B
Frame Start (FRMx_STRT) Register x
Frame Mode (FRMx_MODE) Register x
Frame Start (FRMx_STRT) Register x
7:0
Frame Mode (FRMx_MODE) Register x
7:6
5:4
3:0
Mode [bits]
2 [10]
3 [11]
Bit
7:0
7:6
5:4
3:0
Bit
PROG_OUT(7:0)
MODE
RESERVED
PROG_OUT(11:8)
RESERVED
MODE
RESERVED
PROG_OUT(3:0)
Normal Framing
Frame groups A&B (FGx[0:11]) are programmed as output framing pulses for use with the local
serial data streams (see Figure 16 - “Frame Pulse Timing for Mode 2”). The position of the first
framing signal in a group is determined by an 11 bit quantity. The quantity is the FMIC state
number minus one. The quantity determines when the first framing signal in a group is to be
asserted high.
Inverted Framing
Identical to Normal Framing except the polarity of the framing pulses is logically inverted.
Name
Name
Table 15 - Frame Register Bits for mode 1
Table 14 - Frame Register Bits for Mode 0
Table 13 - Frame Group Mode Bits
All 8 bits are driven out FGx[7:0]
Frame Group Mode
0 [00] Programmed Output
All 4 bits are driven out FGx[11:8]
Frame Group Mode
1 [01] DSi/DSo output enable
All 4 bits are driven out FGx[3:0]
Zarlink Semiconductor Inc.
MT90810
20
Description
Description
Description
Data Sheet

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