PIC18F65J11-I/PT Microchip Technology, PIC18F65J11-I/PT Datasheet - Page 152

• Manufacturer Part Number: PIC18F65J11-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 2048Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 52
• Interface Type: I2C/SPI/USART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F85J11 FAMILY
FIGURE 11-5:
TABLE 11-21: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
DS39774D-page 152
PORTD
LATD
TRISD
PORTE
LATE
TRISE
PSPCON
INTCON
PIR1
PIE1
IPR1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Name
PORTD<7:0>
PSPIF
OBF
GIE/GIEH PEIE/GIEL TMR0IE
WR
TRISD7
IBF
TRISE7
RD
CS
LATD7
LATE7
PSPIF
PSPIE
PSPIP
Bit 7
RD7
RE7
IBF
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
TRISD6
TRISE6
LATD6
LATE6
ADIF
ADIE
ADIP
Bit 6
RD6
RE6
OBF
Q2
TRISD5
TRISE5
LATD5
LATE5
RC1IF
RC1IE
RC1IP
IBOV
Bit 5
RD5
RE5
Q3
Q4
PSPMODE
TRISD4
TRISE4
INT0IE
LATD4
LATE4
TX1IF
TX1IE
TX1IP
Bit 4
RD4
RE4
Q1
TRISD3
TRISE3
SSP1IF
SSP1IE
SSP1IP
LATD3
LATE3
Q2
RBIE
Bit 3
RD3
RE3
—
Q3
TMR0IF
TRISD2
TRISE2
LATD2
LATE2
Bit 2
RD2
RE2
—
—
—
—
Q4
TMR2IE
TMR2IP
TRISD1
TRISE1
TMR2IF
LATD1
LATE1
INT0IF
Q1
Bit 1
 2010 Microchip Technology Inc.
RD1
RE1
—
Q2
TMR1IE
TMR1IP
TRISD0
TMR1IF
TRISE0
LATD0
LATE0
RBIF
Bit 0
RD0
RE0
—
Q3
on page
Values
Reset
Q4
60
60
60
60
60
60
59
57
59
59
59