PIC18F65J11-I/PT Microchip Technology, PIC18F65J11-I/PT Datasheet - Page 370

• Manufacturer Part Number: PIC18F65J11-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 2048Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 52
• Interface Type: I2C/SPI/USART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F85J11 FAMILY
FIGURE 26-8:
TABLE 26-10: CLKO AND I/O TIMING REQUIREMENTS
DS39774D-page 370
150
151
155
160
161
162
163
164
165
166
167
168
169
171
171A
Param.
Operating Conditions: 2.0V < V
AD<15:0>
No
A<19:16>
OSC1
BA0
ALE
OE
CE
TadV2alL
TalL2adl
TalL2oeL
TadZ2oeL
ToeH2adD OE  to AD Driven
TadV2oeH LS Data Valid before OE (data setup time)
ToeH2adl
TalH2alL
ToeL2oeH OE Pulse Width
TalH2alH
Tacc
Toe
TalL2oeH
TalH2csL
TubL2oeH AD Valid to Chip Enable Active
Symbol
Address Out Valid to ALE 
(address setup time)
ALE  to Address Out Invalid
(address hold time)
ALE to OE 
AD High-Z to OE (bus release to OE)
OE  to Data In Invalid (data hold time)
ALE Pulse Width
ALE  to ALE  (cycle time)
Address Valid to Data Valid
OE  to Data Valid
ALE to OE 
Chip Enable Active to ALE 
Q1
PROGRAM MEMORY READ TIMING DIAGRAM
CC
164
Address
< 3.6V, -40°C < T
150
151
Characteristics
171
171A
Q2
167
A
155
< +125°C unless otherwise stated.
160
Q3
Address
166
168
169
0.625 T
0.25 T
0.125 T
0.75 T
0.25 T
165
0.5 T
Data from External
Q4
Min
10
20
—
—
—
CY
CY
CY
CY
162
5
0
0
CY
163
CY
– 10
– 5
– 25
– 20
– 10
– 5
0.125 T
0.25 T
0.5 T
161
Typ
T
—
—
—
—
—
—
—
—
—
—
—
 2010 Microchip Technology Inc.
CY
Q1
CY
CY
CY
0.625 T
0.5 T
Max
Address
Address
CY
10
—
—
—
—
—
—
—
—
—
—
—
—
CY
– 25
+ 10
Q2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns