PIC18F65J11-I/PT Microchip Technology, PIC18F65J11-I/PT Datasheet - Page 93
![IC PIC MCU FLASH 16KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65J11-I/PT
Manufacturer Part Number
PIC18F65J11-I/PT
Description
IC PIC MCU FLASH 16KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(408 pages)
3.PIC18F63J11-IPT.pdf
(4 pages)
4.PIC18F63J11-IPT.pdf
(36 pages)
5.PIC18F63J11-IPT.pdf
(10 pages)
6.PIC18F63J11-IPT.pdf
(6 pages)
Specifications of PIC18F65J11-I/PT
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
52
Ram Memory Size
2048Byte
Cpu Speed
40MHz
No. Of Timers
4
Interface
I2C, SPI, USART
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
52
Interface Type
I2C/SPI/USART
On-chip Adc
12-chx10-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F63J11-IPT PDF datasheet #2
- PIC18F63J11-IPT PDF datasheet #3
- PIC18F63J11-IPT PDF datasheet #4
- PIC18F63J11-IPT PDF datasheet #5
- PIC18F63J11-IPT PDF datasheet #6
- Current page: 93 of 408
- Download datasheet (4Mb)
7.3
The TBLRD instruction is used to retrieve data from
program memory and places it into data RAM. Table
reads from program memory are performed one byte at
a time.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified
automatically for the next table read operation.
FIGURE 7-4:
EXAMPLE 7-1:
2010 Microchip Technology Inc.
READ_WORD
Instruction Register
Reading the Flash Program Memory
(IR)
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
TBLRD*+
MOVF
MOVWF
TBLRD*+
MOVF
MOVF
READS FROM FLASH PROGRAM MEMORY
READING A FLASH PROGRAM MEMORY WORD
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
TABLAT, W
WORD_EVEN
TABLAT, W
WORD_ODD
(Even Byte Address)
FETCH
Program Memory
(Odd Byte Address)
; Load TBLPTR with the base
; address of the word
; read into TABLAT and increment
; get data
; read into TABLAT and increment
; get data
PIC18F85J11 FAMILY
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word. Figure 7-4
shows the interface between the internal program
memory and the TABLAT.
TBLRD
TBLPTR = xxxxx1
Read Register
TABLAT
TBLPTR = xxxxx0
DS39774D-page 93
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