PIC18F65J11-I/PT Microchip Technology, PIC18F65J11-I/PT Datasheet - Page 222

• Manufacturer Part Number: PIC18F65J11-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 2048Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 52
• Interface Type: I2C/SPI/USART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F85J11 FAMILY
TABLE 17-4:
DS39774D-page 222
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISC
SSPBUF
SSPADD
SSPCON1
SSPCON2
SSPSTAT
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
Note 1:
Name
Alternate bit definitions for use in I
MSSP Receive Buffer/Transmit Register
MSSP Address Register (I
GIE/GIEH PEIE/GIEL
OSCFIF
OSCFIE
OSCFIP
TRISC7
WCOL
PSPIF
PSPIE
PSPIP
GCEN
GCEN
Bit 7
SMP
REGISTERS ASSOCIATED WITH I
ACKSTAT
ACKSTAT ADMSK5
TRISC6
SSPOV
CMIE
CMIP
ADIE
ADIP
CMIF
ADIF
Bit 6
CKE
2
TMR0IE
TRISC5
SSPEN
ACKDT
RC1IE
RC1IP
C™ Slave mode), MSSP Baud Rate Reload Register (I
RC1IF
Bit 5
D/A
—
—
—
2
C Slave mode operations only.
(1)
ADMSK4
TRISC4
ACKEN
INT0IE
TX1IE
TX1IP
TX1IF
Bit 4
CKP
—
—
—
P
(1)
2
C™ OPERATION
ADMSK3
TRISC3
SSPM3
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
RCEN
RBIE
Bit 3
S
(1)
ADMSK2
TMR0IF
TRISC2
SSPM2
LVDIF
LVDIE
LVDIP
Bit 2
PEN
R/W
—
—
—
(1)
ADMSK1
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISC1
 2010 Microchip Technology Inc.
SSPM1
INT0IF
RSEN
Bit 1
UA
2
C Master mode)
2
C™ mode.
(1)
TMR1IF
TMR1IE
TMR1IP
TRISC0
SSPM0
RBIF
Bit 0
SEN
SEN
BF
—
—
—
on page
Values
Reset
57
59
59
59
59
59
59
60
58
58
58
58
58