PIC18F65J11-I/PT Microchip Technology, PIC18F65J11-I/PT Datasheet - Page 284

• Manufacturer Part Number: PIC18F65J11-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 2048Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 52
• Interface Type: I2C/SPI/USART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F85J11 FAMILY
REGISTER 23-5:
REGISTER 23-6:
DS39774D-page 284
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-4
bit 3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-1
bit 0
Note 1:
R/WO-1
WAIT
—
U-0
(1)
CONFIG3L and its associated bits are implemented only in 80-pin devices.
The value of these bits in program memory should always be ‘1’. This ensures that the location is
executed as a NOP if it is accidentally executed.
WAIT: External Bus Wait Enable bit
1 = Wait selections from the WAIT<1:0> bits (MEMCON<5:4>) are unavailable and the device will not wait
0 = Wait programmed by the WAIT<1:0> bits (MEMCON<5:4>)
BW: Data Bus Width Select bit
1 = 16-Bit External Bus mode
0 = 8-Bit External Bus mode
EMB<1:0>: External Memory Bus Configuration bits
00 = Extended Microcontroller mode – 20-Bit Addressing mode
01 = Extended Microcontroller mode – 16-Bit Addressing mode
10 = Extended Microcontroller mode – 12-Bit Addressing mode
11 = Microcontroller mode – external bus disabled
EASHFT: External Address Bus Shift Enable bit
1 = Address shifting enabled – external address bus is shifted to start at 000000h
0 = Address shifting disabled – external address bus reflects the PC value
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘1’
CCP2MX: CCP2 MUX bit
1 = CCP2 is multiplexed with RC1
0 = CCP2 is multiplexed with RE7 in Microcontroller mode (all devices) or with RB3 in Extended
R/WO-1
—
Microcontroller mode (80-pin devices only)
BW
U-0
(1)
CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
WO = Write-Once bit
WO = Write-Once bit
R/WO-1
EMB1
—
U-0
(1)
(1)
R/WO-1
EMB0
—
U-0
(1)
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
EASHFT
R/WO-1
U-0
—
U-0
U-0
—
—
 2010 Microchip Technology Inc.
‘0’ = Bit is cleared
‘0’ = Bit is cleared
U-0
U-0
—
—
CCP2MX
R/WO-1
U-0
—
bit 0
bit 0
(1)