MC908GP32CPE Freescale Semiconductor, MC908GP32CPE Datasheet - Page 171

IC MCU 8MHZ 32K FLASH 40-DIP

MC908GP32CPE

Manufacturer Part Number
MC908GP32CPE
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GP32CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
HC08GP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908GP32CPE
Manufacturer:
NXP
Quantity:
9 282
Part Number:
MC908GP32CPE
Manufacturer:
FREESCALE
Quantity:
20 000
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
14.7 SIM Registers
The SIM has three memory-mapped registers.
Freescale Semiconductor
CGMXCLK
INT/BREAK
IAB
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
Note : Previous data can be operand data or the STOP opcode, depending
CPUSTOP
Address
R/W
IDB
IAB
$FE00
$FE01
$FE03
Figure 14-19. Stop Mode Recovery from Interrupt or Break
on the last instruction.
STOP ADDR
STOP +1
Figure 14-18. Stop Mode Entry Timing
PREVIOUS DATA
MC68HC908GP32 Data Sheet, Rev. 10
Table 14-4. SIM Registers
Register
SBFCR
STOP ADDR + 1
SBSR
SRSR
STOP + 2
Table 14-4
STOP RECOVERY PERIOD
NOTE
NEXT OPCODE
Figure 14-18
STOP + 2
shows the mapping of these registers.
SAME
SP
shows stop mode entry timing.
Access Mode
SAME
User
User
User
SP – 1
SAME
SAME
SP – 2
SIM Registers
SP – 3
171

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