MC908GP32CPE Freescale Semiconductor, MC908GP32CPE Datasheet - Page 175

IC MCU 8MHZ 32K FLASH 40-DIP

MC908GP32CPE

Manufacturer Part Number
MC908GP32CPE
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GP32CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
HC08GP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Chapter 15
Serial Peripheral Interface Module (SPI)
15.1 Introduction
This section describes the serial peripheral interface (SPI) module, which allows full-duplex,
synchronous, serial communications with peripheral devices.
15.2 Features
Features of the SPI module include:
15.3 Pin Name Conventions
The text that follows describes the SPI. The SPI I/O pin names are SS (slave select), SPSCK (SPI serial
clock), CGND (clock ground), MOSI (master out slave in), and MISO (master in/slave out). The SPI
shares four I/O pins with four parallel I/O ports.
The full names of the SPI I/O pins are shown in
follows.
Freescale Semiconductor
Full-duplex operation
Master and slave modes
Double-buffered operation with separate transmit and receive registers
Four master mode frequencies (maximum = bus frequency ÷ 2)
Maximum slave mode frequency = bus frequency
Serial clock with programmable polarity and phase
Two separately enabled interrupts:
Mode fault error flag with CPU interrupt capability
Overflow error flag with CPU interrupt capability
Programmable wired-OR mode
I/O (input/output) port bit(s) software configurable with pullup device(s) if configured as input port
bit(s)
SPRF (SPI receiver full)
SPTE (SPI transmitter empty)
Pin Names:
Full SPI
SPI Generic
Pin Names:
SPI
PTD1/MISO
Table 15-1. Pin Name Conventions
MISO
MC68HC908GP32 Data Sheet, Rev. 10
PTD2/MOSI
Table
MOSI
15-1. The generic pin names appear in the text that
PTD0/SS
SS
PTD3/SPSCK
SPSCK
CGND
V
SS
175

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