MC908GP32CPE Freescale Semiconductor, MC908GP32CPE Datasheet - Page 67

• Manufacturer Part Number: MC908GP32CPE
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GP32CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: HC08GP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Table 5-1
Freescale Semiconductor
10. Verify the choice of P, R, N, E, and L by comparing f
11. Program the PLL registers accordingly:
9. Calculate and verify the adequacy of the VCO programmed center-of-range frequency, f
center-of-range frequency is the midpoint between the minimum and maximum frequencies
attainable by the PLL.
For proper operation,
operation, f
as possible to f
a.
b.
d.
e.
c.
provides numeric examples (numbers are in hexadecimal notation):
In the PRE bits of the PLL control register (PCTL), program the binary equivalent of P.
In the VPR bits of the PLL control register (PCTL), program the binary equivalent of E.
In the PLL multiplier select register low (PMSL) and the PLL multiplier select register high
(PMSH), program the binary equivalent of N.
In the PLL VCO range select register (PMRS), program the binary coded equivalent of L.
In the PLL reference divider select register (PMDS), program the binary coded equivalent of
R.
Exceeding the recommended maximum bus frequency or VCO frequency
can crash the MCU.
The values for P, E, N, L, and R can only be programmed when the PLL is
off (PLLON = 0).
VCLK
2.4576 MHz
4.9152 MHz
7.3728 MHz
2.0 MHz
2.5 MHz
4.0 MHz
5.0 MHz
8.0 MHz
f
VCLK
BUS
must be within the application’s tolerance of f
.
MC68HC908GP32 Data Sheet, Rev. 10
Table 5-1. Numeric Example
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
32.768 kHz
f
VRS
f
f
VRS
RCLK
–
f
=
VCLK
NOTE
NOTE
(
L 2
×
≤
E
f
--------------------------- -
NOM
)f
R
1
1
1
1
1
1
1
1
NOM
VCLK
2
×
2
E
12C
1E9
3D1
132
258
263
384
to f
F5
N
VRS
VCLKDES
and f
P
0
0
0
0
0
0
0
0
, and f
VCLKDES
E
0
1
1
1
2
2
2
2
VRS
Functional Description
. For proper
D1
D1
C0
D0
80
83
80
82
L
must be as close
VRS
. The
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