EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 229

IC ARM920T MCU 200MHZ 352-PBGA

EP9312-IBZ

Manufacturer Part Number
EP9312-IBZ
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-IBZ

Core Size
16/32-Bit
Package / Case
352-BGA
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Controller Family/series
(ARM9)
A/d Converter
12 Bits
No. Of I/o Pins
65
Clock Frequency
200MHz
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1260

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-IBZ
Manufacturer:
CIRRUS
Quantity:
30
Part Number:
EP9312-IBZ
Manufacturer:
HITTITE
Quantity:
1 200
Part Number:
EP9312-IBZ
Manufacturer:
Cirrus Logic Inc
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ScrnLines
LineLength
DS785UM1
31
15
31
15
Address: 0x8003_0030
Default: 0x0000_0000
Definition: Video Screen Lines Register
Bit Descriptions:
Address: 0x8003_0034
Default: 0x0000_0000
Definition: Video Line Length Register
Bit Descriptions:
30
14
30
14
RSVD
RSVD
29
13
29
13
28
12
28
12
PAGE:
NA:
RSVD:
LINES:
RSVD:
27
11
27
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
Video Screen Half-page Starting SDRAM Address -
Read/Write
If DSCAN = ‘1’ in the
Half-page Starting SDRAM Address value written to this
field corresponds to the upper left corner of the bottom half
of the video screen.
Not Assigned. Will return written value during a read.
Reserved - Unknown during read
Lines - Read/Write
The Lines value written to this field specifies the number of
lines to be scanned to the display during normal and half-
page mode operation.
Reserved. Unknown during read.
Raster Engine With Analog/LCD Integrated Timing and Interface
24
24
8
8
RSVD
RSVD
23
23
7
7
22
22
6
6
PixelMode
LINES
LEN
21
21
5
5
20
20
4
4
register, the Video Screen
19
19
3
3
EP93xx User’s Guide
18
18
2
2
17
17
1
1
16
16
7-47
0
0
7

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