EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 382

IC ARM920T MCU 200MHZ 352-PBGA

EP9312-IBZ

Manufacturer Part Number
EP9312-IBZ
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-IBZ

Core Size
16/32-Bit
Package / Case
352-BGA
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Controller Family/series
(ARM9)
A/d Converter
12 Bits
No. Of I/o Pins
65
Clock Frequency
200MHz
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1260

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-IBZ
Manufacturer:
CIRRUS
Quantity:
30
Part Number:
EP9312-IBZ
Manufacturer:
HITTITE
Quantity:
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Part Number:
EP9312-IBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
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9
TXDQBLen
TXDQCurLen
9-80
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
31
15
31
15
Bit Descriptions:
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
Address:
Chip Reset:
30
14
30
14
29
13
29
13
28
12
28
12
TDBA:
0x8001_00B4 - Read/Write
0x0000_0000
Unchanged
Transmit Descriptor Queue Base Length register. The Transmit Descriptor
Queue Base Length defines the actual number of bytes in the transmit
descriptor queue, which thereby sets the maximum number of transmit
descriptors that can be supplied to the MAC at any one time. The length
should be set at initialization time and must define an integral number of
transmit descriptors.
RSVD:
TDBL:
0x8001_00B6 - Read/Write. Note half word alignment.
0x0000_0000
27
27
11
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
Transmit Descriptor Base Address.
Reserved. Unknown During Read.
Transmit Descriptor Base Length.
24
24
8
8
RSVD
RSVD
TDBL
TDCL
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
19
19
3
3
18
18
2
2
17
17
1
1
DS785UM1
16
16
0
0

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