AT89LP214-20XU Atmel, AT89LP214-20XU Datasheet - Page 68

MCU 8051 2K FLASH 20MHZ 14-TSSOP

AT89LP214-20XU

Manufacturer Part Number
AT89LP214-20XU
Description
MCU 8051 2K FLASH 20MHZ 14-TSSOP
Manufacturer
Atmel
Series
89LPr
Datasheet

Specifications of AT89LP214-20XU

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
Package
14TSSOP
Device Core
8051
Family Name
AT89
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
12
Interface Type
SPI/UART
Number Of Timers
2
Core
8051
Processor Series
AT89x
Maximum Clock Frequency
20 MHz
Data Ram Size
128 B
Mounting Style
SMD/SMT
Height
1.05 mm
Length
5.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.4 V
Width
4.5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
23.3
Command Format
Programming commands consist of an opcode byte, two address bytes, and zero or more data
bytes. In addition, all command packets must start with a two-byte preamble of AAH and 55H.
The preamble increases the noise immunity of the programming interface by making it more dif-
ficult to issue unintentional commands.
Figure 23-3 on page 69
shows a simplified flow chart of
a command sequence.
A sample command packet is shown in
Figure 23-4 on page
69. The SS pin defines the packet
frame. SS must be brought low before the first byte in a command is sent and brought back high
after the final byte in the command has been sent. The command is not complete until SS
returns high. Command bytes are issued serially on MOSI. Data output bytes are received seri-
ally on MISO. Packets of variable length are supported by returning SS high when the final
required byte has been transmitted. In some cases command bytes have a don’t care value.
Don’t care bytes in the middle of a packet must be transmitted. Don’t care bytes at the end of a
packet may be ignored.
Page oriented instructions always include a full 16-bit address. The higher order bits select the
page and the lower order bits select the byte within that page. The AT89LP213/214 allocates
5 bits for byte address and 6 bits for page address. The page to be accessed is always fixed by
the page address as transmitted. The byte address specifies the starting address for the first
data byte. After each data byte has been transmitted, the byte address is incremented to point to
the next data byte. This allows a page command to linearly sweep the bytes within a page. If the
byte address is incremented past the last byte in the page, the byte address will roll over to the
first byte in the same page. While loading bytes into the page buffer, overwriting previously
loaded bytes will result in data corruption.
For a summary of available commands, see
Table 23-2 on page
70.
AT89LP213/214
68
3538E–MICRO–11/10

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