AT90CAN64-16MU Atmel, AT90CAN64-16MU Datasheet - Page 218

IC MCU AVR 64K FLASH 64-QFN

AT90CAN64-16MU

Manufacturer Part Number
AT90CAN64-16MU
Description
IC MCU AVR 64K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN64-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Operating Supply Voltage
0.5 V to 0.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90CAN64-16MU
Manufacturer:
ATMEL
Quantity:
210
Part Number:
AT90CAN64-16MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
18.8
18.8.1
218
Transmission Modes
AT90CAN32/64/128
Master Transmitter Mode
The TWI can operate in one of four major modes. These are named Master Transmitter (MT),
Master Receiver (MR), Slave Transmitter (ST) and Slave Receiver (SR). Several of these
modes can be used in the same application. As an example, the TWI can use MT mode to write
data into a TWI EEPROM, MR mode to read the data back from the EEPROM. If other masters
are present in the system, some of these might transmit data to the TWI, and then SR mode
would be used. It is the application software that decides which modes are legal.
The following sections describe each of these modes. Possible status codes are described
along with figures detailing data transmission in each of the modes. These figures contain the
following abbreviations:
In
bers in the circles show the status code held in TWSR, with the prescaler bits masked to zero. At
these points, actions must be taken by the application to continue or complete the TWI transfer.
The TWI transfer is suspended until the TWINT flag is cleared by software.
When the TWINT flag is set, the status code in TWSR is used to determine the appropriate soft-
ware action. For each status code, the required software action and details of the following serial
transfer are given in
these tables.
In the Master Transmitter mode, a number of data bytes are transmitted to a slave receiver (see
Figure
mat of the following address packet determines whether Master Transmitter or Master Receiver
mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R is transmitted,
MR mode is entered. All the status codes mentioned in this section assume that the prescaler
bits are zero or are masked to zero.
Figure 18-12
S:
Rs:
R:
W:
A:
A:
Data:
P:
SLA:
18-11). In order to enter a Master mode, a START condition must be transmitted. The for-
START condition
REPEATED START condition
Read bit (high level at SDA)
Write bit (low level at SDA)
Acknowledge bit (low level at SDA)
Not acknowledge bit (high level at SDA)
8-bit data byte
STOP condition
Slave Address
to
Figure
Table 18-3
18-18, circles are used to indicate that the TWINT flag is set. The num-
to
Table
18-6. Note that the prescaler bits are masked to zero in
7679H–CAN–08/08

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