AT90CAN64-16MU Atmel, AT90CAN64-16MU Datasheet - Page 250

• Manufacturer Part Number: AT90CAN64-16MU
• Description: IC MCU AVR 64K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN64-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT90CANx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 2
• Operating Supply Voltage: 0.5 V to 0.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.8.2
250
CANSTMOB.6
CANSTMOB.4
CANSTMOB.1
CANSTMOB.5
CANSTMOB.3
CANSTMOB.2
CANSTMOB.0
CANGIT.1
CANGIT.5
CANGIT.4
CANGIT.3
CANGIT.2
CANGIT.0
CANGIT.6
AT90CAN32/64/128
Interrupt Behavior
OVRTIM
TXOK[i]
RXOK[i]
BERR[i]
SERR[i]
CERR[i]
FERR[i]
AERR[i]
BOFFI
BXOK
SERG
CERG
FERG
AERG
Figure 19-14. CAN Controller Interrupt Structure
When an interrupt occurs, an interrupt flag bit is set in the corresponding MOb-CANSTMOB reg-
ister or in the general CANGIT register. If in the CANIE register, ENRX / ENTX / ENERR bit are
set, then the corresponding MOb bit is set in the CANSITn register.
To acknowledge a MOb interrupt, the corresponding bits of CANSTMOB register (RXOK,
TXOK,...) must be cleared by the software application. This operation needs a read-modify-write
software routine.
To acknowledge a general interrupt, the corresponding bits of CANGIT register (BXOK, BOF-
FIT,...) must be cleared by the software application. This operation is made writing a logical one
in these interrupt flags (writing a logical zero doesn’t change the interrupt flag value).
OVRTIM interrupt flag is reset as the other interrupt sources of CANGIT register and is also
reset entering in its dedicated interrupt handler.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error will also
be raised. Consequently, two consecutive interrupts can occur, both due to the same error.
When a MOb error occurs and is set in its own CANSTMOB register, no general error is set in
CANGIT register.
CANGIE.4
ENTX
CANGIE.5
ENRX
CANGIE.3
CANGIE.2
ENERR
ENBX
CANGIE.1
ENERG
CANSIT 1/2
SIT[i]
CANGIE.6
ENBOFF
CANIE 1/2
IEMOB[i]
0
i
CANGIT.7
CANIT
CANGIE.7
CANGIE.0
ENOVRT
ENIT
7679H–CAN–08/08
CAN IT
OVR IT