AT90CAN64-16MU Atmel, AT90CAN64-16MU Datasheet - Page 242

• Manufacturer Part Number: AT90CAN64-16MU
• Description: IC MCU AVR 64K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN64-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT90CANx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 2
• Operating Supply Voltage: 0.5 V to 0.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.4.3
242
Notes: 1. Phase error < 0
AT90CAN32/64/128
Baud Rate
5. Synchronization Segment: SYNS
2. Phase error > 0
3. Phase error > 0
4. Phase error < 0
Tsyns=1
x
Tscl (
The total number of TQ in a bit time has to be programmed at least from 8 to 25.
Figure 19-7. Sample and Transmission Point
Figure 19-8. General Structure of a Bit Period
With no baud rate prescaler (BRP[5..0]=0) the sampling point comes one time quantum too
early. This leads to a fail according the ISO16845 Test plan. It is necessary to lengthen the
Phase Segment 1 by one time quantum and to shorten the Phase Segment 2 by one time quan-
tum to compensate.
The baud rate selection is made by T
1. Tsyns = 1 x Tscl = (BRP[5..0]+ 1)/clk
2. Tprs = (1 to 8) x Tscl = (PRS[2..0]+ 1) x Tscl
3. Tphs1 = (1 to 8) x Tscl = (PHS1[2..0]+ 1) x Tscl
4. Tphs2 = (1 to 8) x Tscl = (PHS2[2..0]
CLK
fixed
F
Data
CAN
)
IO
CLK
IO
Tbit
Tsyns(5)
(1)
= Tsyns + Tprs + Tphs1 + Tphs2
1
Prescaler BRP
/
CLK
IO
Tscl (TQ)
Tprs
bit
Time Quantum
calculation:
Fcan (Tscl)
Bit Rate Prescaler
IO
one nominal bit
(2)
(= 1TQ)
+ 1) x Tscl
Tbit
Tphs1+Tsjw
Tphs1
PHS1 (3-bit length)
PHS2 (3-bit length)
PRS (3-bit length)
SJW (2-bit length)
Bit Timing
or
(
1
)
(
3
Sample
)
Point
Tphs2+Tsjw
Tphs2
or
Transmission
(
2
Transmission
)
7679H–CAN–08/08
(
Sample
4
)
Point
Point
Point